RSSI ( receive signal strength indication/indicator) circuits and issues

A common circuit used in most wireless receivers is the RSSI circuit or block. It simply measures or provides an indication of the signal strength being received. It is usually implemented within the receiver chip. The circuitry used for the RSSI appears to be simple but there are a number of issues that must be borne in mind. To begin with, a RSSI circuit can be implemented using the concept of log amplifiers. A really good source of information on these is the Analog Devices website. It may take a bit of searching to find the right article but it is worth it.Also a tutorial article has been already published in these blog posts which may be of some use. However, through experience it has been found ( at SPG) that even if we follow prior art on RSSI design it still takes some doing. Here are a few tips if one is thinking of doing a rssi circuit. ( Of course higher frequencies complicate things even more). (1) Must understand the techniques intuitively. (2) Select a process that can meet the ft/IKF/Hfe/CBC requirements easily. (3)Simulations will take a long time so must be prepared for long simulation times. (4) Bond pad and package parasitics will play a significant role in the performance. So the more accurate these are the better. If package parasitic information is not available then it must be generated ( which is a project in its own right). For more information please access the RSSI design paper in the SPG website located at http://www.signalpro.biz, under engineering pages or contact SPG directly using the contact details provided.

Generate a PWL input for a SPICE simulator from a logic vector

In a number of cases of simulation of variable time waveforms the PWL format is used in SPICE based circuit simulators. If the statement is really short with only two or three pairs of values it can be input manually by hand. However, if the number of (time, value) pairs is large then a resource is required that can generate the PWL waveform using some kind of CAD program. Signal Processing Group Inc., recently released a related script in C++ that can be used for this task. It consists of an input file generated from a text resource ( in this case a MATLAB file, also included)which has a 1,0 vector of numbers. 1,0 of course representing logic high and logic low. This file can be as long as needed. This file is input into the C++ program which converts the file into a PWL statement for the simulator. To access this program please visit http://www.signalpro.biz and go to "Register for free stuff" The program can be downloaded free of cost through this gateway. The program has been tested using Windows XP.To run it on a different platform may require re-compilation and build.

IC Design: The Brokaw voltage reference

Voltage references are a ubiquitous function in most analog and analog-digital mixed signal designs. In most cases they need not be excessively tightly specified. A very practical voltage reference with good characteristics is the Brokaw`reference named after its inventor Paul Brokaw. It is versatile reference and quite popular. Recently Signal Processing Group Inc., released a detailed report on the complete design and layout of a Brokaw`reference in BiCMOS. To access this report please visit http://www.signalpro.biz and click on "Register for Free Stuff". The entire report can be downloaded for free.

Delta-Sigma oversampled A/D converter principles

Delta-sigma oversampled systems, particularly A/D converters are very useful circuits. This is specially true now when the semiconductor line widths are decreasing significantly and purely analog converters are becoming hard to design and implement in VLSI technology. A delta - sigma converter is mostly digital with a small amount of analog circuitry. As fine line technology is well suited to digital implementation a delta - sigma converter can be very useful indeed. A brief paper on the delta-signal principle was released by Signal Processing Group Inc. and may be found under the free reports accessed by registering on the SPG website by interested readers. Please visit http://www.signalpro.biz.

A simple planar inductor

In Integrated Circuit design and MMIC design, integrated planar inductors are used frequently. These inductors have typically lower quality factors. However, in a variety of applications planar inductors can be used effectively. The simplest planar inductor is a length of high characteristic impedance microstrip line. A brief paper published by Signal Processing Group Inc.,provides design equations for this type of structure. Interested readers can view the paper at SPG's website, http://www.signalpro.biz on the engineering pages web page.

MEMS design tools

Its interesting how the MEMS design development is paralleling the IC design methodology of yesteryear. The process appears to be very similar,only the parameters seem to change. We also see UC Berkeley developing methodology and CAD tools. MIT is also an early entrant into the CAD Tool fray. Commercially available tools from Coventor are available ( for a significant cost) but may be the best deal for the design engineer interested in end results rather than the process. It remains to be seen how this whole industry pans out. However, already there are large numbers of MEMS devices working in commercial systems so the MEMS approach is beginning to make sense. Contact SPG at http://www.signalpro.biz for our experince with MEMS related issues.

Impedance matching: An example

Impedance matching is a key task in RF design and and also in lower frequency design where power transfer is an issue. A number of techniques exist to do this. Some are built-in scripts for advanced CAD programs while other techniques are manual. One of the techniques used quite commonly is the L - Section impedance matching technique. It is of interest to examine this technique. A recent technical memorandum released by the techteam at Signal Processing Group Inc. describes in some detail the matching of an antenna impedance and a resonant circuit associated with the antenna. It shows the detailed development of the matching circuit and checks that can be made to evaluate it. A PSPICE simulation is also shown along with the .cir file and plots. Interested readers are directed to the SPG website at http://www.signalpro.biz > "Engineer's Corner" for details.